1. Field of the Invention
The present invention relates to thin films and production methods thereof, and more particularly to thin films (e.g., semiconductors) capable having one or more structures (e.g., microelectronics) formed thereon or therein.
2. Description of the Prior Art
Thin film materials such as semiconductors are the backbone of many of today's miniaturized products. These everyday devices are, for example, based on integrated circuits, photovoltaics, or the like. Improvements in these products are constantly being sought, typically to enhance performance and reliability, as well as to reduce material and labor costs associated with manufacture thereof.
A primary objective in processing of many semiconductors and other thin film devices is to form thin films with very small dimensions (e.g., on the order of microns). Thin devices may be useful for structural objectives, such as smaller and more lightweight products, and performance objectives, such as speed and reliability. For example, portable electronics, solar cells, DRAMs, and many other systems benefit from thinner semiconductor devices. Further, many devices employ a plurality of stacked semiconductor devices, forming a three dimensional circuit, for example. One such three dimensional system is described in U.S. Pat. Nos. 5,786,629 entitled “3-D Packaging Using Massive Fillo-Leaf Technology” by Sadeg. M. Faris and incorporated herein by reference.
Accordingly, improvements in the thin films themselves are required. Indeed many attempts have been made to improve processing and reliability of thin film based devices, while reducing the thickness thereof. It is well recognized that it is desirable to separate the substrate layer and the thin film device layer. Further, since most materials used to form thin film substrates (e.g., semiconductors) are relatively expensive, minimization of wasted material is desirable. However, many conventional thin film substrates processing methods waste material, as described below.
Certain devices, such as photovoltaics, require use of the thin films alone (i.e., without a substrate). In other conventional arrangements, a thin film semiconductor substrate having microelectronics or other useful structures thereon are supported on a substrate (e.g., Si). The thin film substrate may be grown, for example, using epitaxial growth techniques. However, formation of a uniform film is difficult with this technique. Further, layer growth is extremely cumbersome when the substrate materials are different. Therefore, it is very desirable to transfer a thin semiconductor device layer to a foreign substrate.
Conventional manufacturing processes for forming thin film devices include forming a circuit or other useful element (e.g., electronic, optical, and photovoltaic) on a substrate. During processing, the substrate is required to provide mechanical support and thermal stability. The processed substrate, therefore, must be sufficiently thick to withstand the harsh processing environment, including high pressures and temperatures, as well as chemical and energy exposure. Further processing is therefore required if viable thin film devices are sought.
One processing approach, undertaken after a circuit or other structure is formed on a sufficiently thick substrate to withstand processing, is to remove the thickness of the substrate by mechanical methods. These mechanical methods, such as cutting or grinding, waste a tremendous amount of material and labor. The cut or ground material often may not be recycled, or, even if it is recyclable, the material must undergo further processing before reuse. Further, the thinned substrate is generally subjected to polishing or other processes to smooth the surface. Other techniques include formation of an etch stop layer on the substrate prior to device fabrication. However, the substrate is still typically ground or otherwise mechanically removed prior to a selective etching step, which etches the substrate generally to the etch stop layer. All of these techniques result in wasted time and material, as well presenting quality control concerns.
Another technique to form thin film devices utilizes ion implantation methods. A common use of ion implantation is to generally derive thin layers of semiconductor materials. Such methods are disclosed in, for example, EP01045448 and WO00/024059, both entitled “Method of Producing SOI Wafer by Hydrogen Ion Implanting Separation Method and SOI Wafer Produced by the Method,” and both incorporated by reference herein. Particularly, ions, such as hydrogen ions or helium ions, are implanted within the top surface of an oxidized silicon wafer. The ions are implanted to a depth within the top surface. Thereafter, a thin layer may be delaminated from the bulk silicon substrate, which is generally subjected to high temperature (greater than about 500° C.) processes. This thin layer may be then supported on an insulator layer and a substrate, and microelectronics or other structures may be formed thereon. The microelectronics, however, must be formed subsequent to delaminating the thin layer, since ion implantation detrimentally affects the microelectronics. Particularly, the thin layer may be warped, the devices may be damaged by the ion implantation, or the device may be damaged during delamination.
Bruel et al. WO 98/33209, entitled “Method For Obtaining A Thin Film, In Particular Semiconductor, Comprising A Protected Ion Zone And Involving An Ion Implantation”, discloses an approach to providing a thin film including a metal oxide semiconductor (MOS). In general, a MOS transistor is formed on the surface of a semiconductor substrate. The region of the transistor is masked, and surrounding regions are ion implanted to define an intended line of fracture (i.e., where microbubbles develop from the ion implantation step). To separate the thin film having the transistor thereon, cleavage is commencing at the intended line of fracture in the vicinity of the microbubbles, and is propagated through the crystal plane under the transistor (i.e., where no microbubbles exist). While it may be possible to realize thin films having transistors thereon using the teachings of WO 98/33209, the transistors are subjected to undesirable stress in the cleavage propagation, since the crystalline structure of the substrate material must be fractured in the immediate vicinity of the transistor.
Aspar et al. U.S. Pat. No. 6,103,597 entitled “Method Of Obtaining A Thin Film Of Semiconductor Material” generally teaches subjecting a thin film substrate having microelectronics or other structures therein to ion bombardment. Gaseous microbubbles are thus formed at a depth therein defining the thickness of the thin film. However, many types of microelectronics and structures that may be formed on the substrate require a subsequent annealing step, in order to repair damage or other defects imparted to the elements. Thereafter, the thin film layer is taught to be separable from the underlying substrate material by thermal treatment that causes a fracture along the line of the microbubbles.
Sakaguchi et al., U.S. Pat. Nos. 6,221,738 entitled “Substrate And Production Method Thereof” and U.S. Pat. No. 6,100,166 entitled “Process For Producing Semiconductor Article”, both of which are incorporated by reference herein, teach bonding a substrate to a porous semiconductor layer. The bonding at the porous layer is taught to be mechanically weaker, thus facilitating removal by application of an external force. U.S. Pat. No. 6,100,166 teaches that a layer may be removed with a force in a peeling direction. However, both of these references disclose use of the weak porous separation mechanism at the entire interface between the layers. This may compromise overall mechanical integrity of the intermediate structure and any semiconductor devices formed on the porous semiconductor material.
Henley et al., U.S. Pat. No. 6,184,111 entitled “Pre-Semiconductor Process Implant And Post-Process Film Separation,” which is incorporated by reference herein, discloses use of a stressed layer at a selected depth below a silicon water surface. Devices are formed above the stressed layer. Implantation is generally carried out at the same energy level with varying dosage across the diameter of the wafer. Controlled cleavage propagation is initiated to separate a layer above the stressed layer, including any devices thereon. It is noted that processing to form the stressed layer may damage devices formed thereon, thus subsequent repair annealing is typically required. Therefore, conventional ion implantation and delamination methods are lacking in that a thin film including microelectronics or other structures thereon may not be ion implanted without warping or other damage to the thin semiconductor.
Therefore, considering the deficiencies of present thin film processing, it would be desirable to provide a multiple layered substrate, wherein a device layer is provided on a support layer in a condition to allow processing of microelectronics or other structures, such that the device layer with the structures formed therein or thereon is readily removable from the support layer.
It would further be desirable to provide a method of manufacturing a thin layer having microelectronics or other structures by processing the structures on a device layer, wherein the device layer is disposed a support layer, such that the device layer may be removed by peeling or other convenient methods.
Additionally, it would be desirable to provide a user a multiple layered substrate having device regions on a device layer, such that the user may process microelectronics or other structures therein or thereon, and substantially remove the device layer by peeling or other convenient methods.